Single neuron neural PID controller hardware-in-the-loop implementation method using FPGA

Abstract

The single neuron neural PID-controller hardware-in-the-loop implementation method using FPGA is offered in the paper. The step-wise synthesis algorithm is given. Simulation was done using MATLAB and Xilinx System Generator. Particular example of single neuron PID-controller control system synthesis is described. Some calculations of optimality of bit grid data that assure the accuracy of PID-controller performance are done.