Radioelectronics and radioelectronic equipment manufacturing
Humidity-sensitive dual-gate MIS-transistor
Keywords
humidity-sensitive dual-gate mis-transistor
humidity
porous silicon oxide
Abstract
The paper deals with the structure and mathematical modeling of dual-gate humidity-sensitive MIS-transistor based on porous silicon oxide. Authors received analytical dependence of the impedance of the structure and graphic dependences of active and reactive component impedance and capacities of the structure with changes of ambient humidity. In the range of relative humidity from 10 to 90% capacity of the structure varies from 200 to 700 uF.
How to Cite
[1]
“Humidity-sensitive dual-gate MIS-transistor”, Вісник ВПІ, no. 6, pp. 93–96, Nov. 2010, Accessed: Oct. 10, 2026. Available: https://visnyk.vntu.edu.ua/index.php/visnyk/article/view/1623
