Radioelectronics and radioelectronic equipment manufacturing

FPGA implementation of the adaptive speckle noise filter using EP3C55

Authors

Y. Y. Bilynskyi
Vinnytsia National Technical University ROR
A. O. Melnychuk
Vinnytsia National Technical University ROR
O. A. Pavliuk
Vinnytsia National Technical University ROR

Keywords

speckle noise filter fpga speed parallel data processing

Abstract

Hardware implementation of the US-images adaptive speckle noise filter is presented in the paper. The Altera FPGA ЕР3С55 is used for designing. Simulation of the filter is conducted using the Quartus II software. It has been shown that time, needed for one pixel processing is in 25 times less for hardware than for software.
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How to Cite

[1]
“FPGA implementation of the adaptive speckle noise filter using EP3C55”, Вісник ВПІ, no. 6, pp. 258–261, Nov. 2010, Accessed: Oct. 10, 2026. Available: https://visnyk.vntu.edu.ua/index.php/visnyk/article/view/1604

Author Biographies

Y. Y. Bilynskyi, Vinnytsia National Technical University
завідувач кафедри електроніки
A. O. Melnychuk, Vinnytsia National Technical University
асистент
O. A. Pavliuk, Vinnytsia National Technical University
аспірант

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