The mathematical models of sensitivity of comparator as a component of redundant successive approximation ADC

Abstract

The new speed increase method of ADC based on redundant positional count system is proposed. The main idea is to use the variable sensitivity comparators. The comparator sensitivity reducing on the higher order conversion steps allows by a large amount to increase its speed and as result the duration of the higher order conversion steps will be considerably shorter. The mathematical relations for the comparator sensitivity reducing limit are derived.